Below are examples of typical reports Mr. York has written in the past and their general content.
Detailed Physical Quality and Competitive Analysis
Detailed text describing procedure
used for analysis, conclusions or results from analysis, table illustrating
specific tests or analysis performed on each part, detailed description of
general fabrication process layers, design features, and materials, detailed
list of critical horizontal feature sizes and process layer thicknesses,
documentation of package and assembly, die surface features and cross-sectional
process layers with annotated optical microscope images, annotated Scanning
Electron Microscope (SEM) images of surface features at various tilt angles, annotated
SEM images of semiconductor die cross sections to illustrate general process
layers, specific process features, transistor device structures, diffusions and
implants, materials identification spectrums.
Many of these older reports were solicited by and donated to the Smithsonian Institution for inclusion in their Chip Collection, and are regularly used as reference and research sources for new inventions and patents.
Patent Claim Charts
Patent Claim Charts showing specific claim
language and images of actual physical process or design feature from product
and annotated and color-coded to specific claim element.
Detailed text describing failure
region and analysis steps used, and illustrating optical or SEM images of suspect failure
Detailed Technical Patent
General area of technology, possible current or future
products or manufacturers using the inventive or similar elements, general
description of invention, key elements to each claim of the invention
(independent and dependent claims), suspect physical or materials analysis
required to document key elements of the invention.
Circuit Extraction (Reverse Engineering)
Optical images of specific circuit
areas at each interconnect and transistor stage, transistor level or logic
level circuit schematic showing each transistor or device annotated to the
physical transistor layout on the images, and transistor sizes.
Developed cell libraries showing
optical images of cell circuit layouts annotated to cell schematic/logic to
supplement circuit extraction projects on gate array and standard cell circuit
Compiled processes, technical
design features, and documentary images of specific product groups or new
process technologies within specified timeframe.